ExerionBit provides specialized bootloader engineering for ESP32 RISC-V teams. The work centers on ESP32-C3 bring-up and scoped boot-path adaptation, with code you fully own and behavior you can actually audit.
Public proof starts on real ESP32-C3 hardware with deterministic logs, recovery/update baseline paths, and explicit known limits. When broader architecture review is needed, a portable RISC-V reference is also available.
Work stays intentionally narrow: bring-up, boot decision logic, recovery/update baseline, validation artifacts, and scoped private follow-on when required. Additional targets require their own validation scope.
Everything ships with readable code, explicit behavior, and a clear audit trail — no vendor black boxes, no hidden init sequences. When stricter requirements apply — signed images, key lifecycle, production hardening — that work is handled as a private scoped engagement.
Scoped Capabilities
ESP32-C3 Bring-up
Custom board bring-up without SDK bloat. Deterministic boot-path work for teams moving from devkits to production hardware, with minimal logic and explicit handoff.
Validation Evidence
Audit-ready artifacts. Expected-vs-observed logs, stable serial tokens, and explicit limits so claims stay tied to reproducible evidence.
Security Scope
Minimal secure boot baseline on real hardware. Advanced hardening, key lifecycle details, and production security architecture are private and separately scoped.
ESP32-C3 Proof
recovery/update path evidence, and explicit known limits.
Portable RISC-V Reference
early port scoping, and architecture de-risking before board-specific work.